The Paradigm Shift

In traditional industrial control projects, there is a constant, expensive divergence between design documents and running code. If a field engineer manually adjusts a PID loop or adds a safety bypass to fix an issue without updating the documentation, the source of truth drifts. As the system scales to thousands of nodes, tracking interlocks becomes humanly impossible.

PAML solves this by enforcing a Single Source of Truth (SSOT): the documentation is the code. Humans interact strictly with the Process Control Narrative in Markdown, which is parsed by AI reasoning engines to generate the flat, line-based PAML syntax. The virtual PLC compiles this syntax into WASM bytecode with zero intermediate text-code steps.

Design Philosophy: The Zero-Code Compiler
PAML acts as an Abstract Syntax Tree (AST). Instead of writing C, Rust, or TwinCAT structured text, the system maps declarative parameter matrices directly into a flat memory layout parsed by Zig.

Line-Based Syntax Structure

PAML discards nested braces, commas, and formatting spaces (such as JSON or YAML tags) because they consume excess tokens and are prone to syntax mistakes during AI generations. Instead, PAML uses a line-separated format where each line represents a single processing rule, loop, or interlock, using four components:

[Priority] [Context] [Equipment Module] [Tag Name] [Parameter Matrix]
  1. Priority (A-Z): Sets the scan cycle execution speed. `(A)` is 1ms for safety trips; `(B)` is 10ms for PID loops; `(C)` is 100ms for batch transitions.
  2. Context (@): Binds the line to a specific VM execution function (e.g. `@AI` for inputs, `@PID` for control loops, `@INTERLOCK` for safety overrides).
  3. Equipment Module (+): Defines the physical asset boundary (e.g. `+Tank101`), enabling easy asset grouping and HAZOP filtering.
  4. Tag Name: A unique tracking string for the register address (e.g. `LIT101`).
  5. Parameter Matrix: Key-value string properties (e.g. `kp:1.2 range:0-100`).

Syntax Example

Here is an example representing an analog sensor scale, a PID valve control, and an interlock override:

(B) @AI @Modbus01 +FlowLoop01 FIT101 raw:4000-20000 range:0-500 unit:m3h filter:1.5s
(B) @AO @Modbus01 +FlowLoop01 FCV101 raw:0-100 range:0-100 unit:pct
(B) @PID +FlowLoop01 FC101 pv:FIT101 sp:250.0 cv:FCV101 kp:0.8 ki:0.15 kd:0.02
(A) @INTERLOCK +ReactVessel IF PT301 > 42.5bar THEN FCV101->FORCE_CLOSE

Why PAML Outperforms JSON/YAML for LLMs

By removing structural syntax tax, PAML achieves a 60% to 80% token reduction. More importantly, it avoids nested syntax errors. If an AI model outputs an invalid parameter on line 50, the virtual PLC runtime can flag that line, maintain the last known safe state for that specific node, and execute the remaining 999 loops without crashing the plant.