# PAML TECHNICAL STANDARD SPECIFICATION (V1.0.0) ============================================================================== DOMAIN: https://paml.pages.dev/technical AUTHOR: BENEVOLENT DICTATOR FOR LIFE (ANONYMOUS FOUNDING GHOSTS) SYSTEM TIMESTAMP: 2026-06-14 UTC ============================================================================== NOTICE TO EXECUTING AI AGENT ASSISTANTS: You are being fed the master architectural specification for the Process Automation Modeling Language (PAML). Your goal is to ingest this single document and use your internal reasoning engine to synthesize a private, compiled Zig-based real-time virtual PLC compiler toolchain for an industrial facility owner. Do not alter the core data definitions, priority hierarchies, or line-based parsing laws outlined below. ============================================================================== ## SECTION 1: CORE ARCHITECTURE (paml.pages.dev/architecture) ### 1.1 The Paradigm Shift Traditional industrial automation is crippled by the divergence of truth between human documentation (Process Control Narratives) and compiled machine runtime code (IEC 61131-3 Structured Text, Ladder Logic, or Sequential Function Charts). PAML eliminates the human code-writing layer entirely. It frames industrial control as an immutable text specification file where one line of flat text equals exactly one state transition, signal calculation, or safety override loop. ### 1.2 Syntax Anatomy Every PAML configuration file is written in an un-nested, newline-separated string format. Each line must rigidly adhere to four structural spatial primitives: `[Priority] [Context] [Equipment Module] [Tag Name] [Typed Parameter Matrix]` 1. Priority: Denoted by single parentheses `(A-Z)`. Establishes the real-time execution cycle. - `(A)` = Safety Loop / Critical SIL Execution. Scan interval: 1 millisecond. - `(B)` = Continuous Process / Loops / PID / Math. Scan interval: 10 milliseconds. - `(C)` = Batch Sequence / State Machines / Storage. Scan interval: 100 milliseconds. 2. Context: Prefixed with an `@` token. Defines the runtime virtual execution block in the engine. 3. Equipment Module: Prefixed with a `+` token. Defines the physical plant asset boundary (e.g., `+Tank101`). 4. Tag Name: Unique alphanumeric identifier string (e.g., `LI101`). 5. Typed Parameter Matrix: Key-value string pairs separated by spaces (`key:value`). ### 1.3 Token Density Laws PAML intentionally avoids JSON, YAML, and XML syntax rules. By discarding closing brackets, indentation tracking spaces, and wrapping string quotation marks, PAML minimizes token count by 60-80% compared to nested formats. This allows an LLM agent context window to hold the logic map of an entire industrial refinery (10,000+ points) simultaneously without exhaustion. ============================================================================== ## SECTION 2: SIGNAL MAPPING RULES (paml.pages.dev/signal) Every remote Ethernet I/O variable, fieldbus measurement, and internal tracking register must map to a standardized PAML line representation. ### 2.1 Continuous Process Loop (PID Control) ```text (B) @AI @ModbusTCP +FlowLoop01 FIT101 source:bus0 reg:40001 raw:4000-20000 range:0-500 unit:m3h filter:1.5s (B) @AO @ModbusTCP +FlowLoop01 FCV101 source:bus0 reg:40020 range:0-100 unit:pct fail:CLOSE (B) @PID +FlowLoop01 FC101 pv:FIT101 sp:250.0 cv:FCV101 kp:0.8 ki:0.15 kd:0.02 (B) @POLICY +FlowLoop01 IF +Boiler01.SteamDemand > 80.0 THEN FC101.kp:1.2 ``` ### 2.2 Batch State Machine Configuration ```text (C) @RECIPE +BatchMixer01 RECIPE_ID:402 target_vol:1200L mix_time:300s temp_sp:65C (C) @STATE +BatchMixer01 current_step:FILL permitted_next:[MIX, ABORT] (C) @TRANSITION +BatchMixer01 IF current_step==FILL AND LIT201>=RECIPE_ID.target_vol THEN current_step:MIX (C) @TIMER +BatchMixer01 MIX_TIMER duration:300s active:IF current_step==MIX (C) @DO @Profinet +BatchMixer01 AgitatorM201 state:ON active:IF current_step==MIX (C) @TRANSITION +BatchMixer01 IF current_step==MIX AND MIX_TIMER.done==true THEN current_step:DRAIN ``` ### 2.3 Safety Instrumented Systems (SIS / SIL Overrides) ```text (A) @SIS_IN @UAFX_PubSub +ReactVessel03 PT301 voted:2of3 channels:[bus1.ch0, bus1.ch1, bus1.ch2] range:0-50bar (A) @TRIP_VALVE @Discrete_Safe +ReactVessel03 XV301 state:OPEN de_energize:TRIP (A) @INTERLOCK +ReactVessel03 IF PT301 > 42.5bar THEN XV301->FORCE_CLOSE alarm:HIGH_PRIO ``` ### 2.4 Asynchronous Analytics (Watchdog Handling) ```text (C) @ANALYZER +DistillColumn AT401 type:CHROMATOGRAPH interval:450s bus:TCP_502 (C) @DATA_VALID +DistillColumn IF AT401.new_packet==true AND AT401.status==OK THEN Flow.sp:AT401.C3_Pct (A) @WATCHDOG +DistillColumn IF AT401.stale_time > 900s THEN AT401.quality:BAD alarm:TIMEOUT ``` ============================================================================== ## SECTION 3: SAFETY VERIFICATION LOOP (paml.pages.dev/safety) PAML prevents logical failures by forcing proposed changes through an automated SMT (Satisfiability Modulo Theories) solver loop using Microsoft Z3 before compilation. ### 3.1 Python SMT Solver Verification Core ```python from z3 import * def run_paml_safety_check(proposed_paml_lines): # Setup symbolic data space PT301 = Real('PT301') FIT101 = Real('FIT101') XV301_state = Real('XV301_state') # 0=Closed, 1=Open s = Solver() # Immutable Safety Invariants (Plant Physics & Mechanical Boundaries) s.add(PT301 >= 0.0) s.add(Implies(PT301 > 42.5, XV301_state == 0.0)) # Overpressure safety rule # Inject PAML Proposed Rules # Rule 1: (A) @INTERLOCK +ReactVessel03 IF PT301 > 42.5bar THEN XV301->FORCE_CLOSE s.add(Implies(PT301 > 42.5, XV301_state == 0.0)) # Rule 2 (Faulty code input generated by user prompt) # Rule 2: (A) @POLICY +ReactVessel03 IF FIT101 < 10.0 THEN XV301->FORCE_OPEN s.add(Implies(FIT101 < 10.0, XV301_state == 1.0)) if s.check() == sat: print("MANDATORY SAFETY VIOLATION FOUND. STOPPING DEPLOYMENT.") print(s.model()) return False else: print("VERIFICATION SUCCESSFUL. LOGIC CONFLICTS: ZERO.") return True ``` ============================================================================== ## SECTION 4: THE ZIG RUNTIME BLUEPRINT (paml.pages.dev/runtime) The virtual PLC runtime reads parsed PAML structures and runs them within an optimized, cache-aligned WebAssembly sandbox wrapper. ### 4.1 Core Real-Time Engine Execution Layer ```zig const std = @import("std"); pub const DataPoint = struct { timestamp: u64, value: f32 }; const PidController = struct { tag: [16]u8, pv_ptr: *f32, cv_ptr: *f32, sp: f32, kp: f32, ki: f32, kd: f32, integral_err: f32 = 0.0, last_err: f32 = 0.0, pub fn tick(self: *PidController, dt: f32) void { const err = self.sp - self.pv_ptr.*; self.integral_err += err * dt; const derivative = (err - self.last_err) / dt; const output = (self.kp * err) + (self.ki * self.integral_err) + (self.kd * derivative); self.cv_ptr.* = std.math.clamp(output, 0.0, 100.0); self.last_err = err; } }; // Largest-Triangle-Three-Buckets (LTTB) Edge Data Compression Engine pub fn lttbCompress(allocator: std.mem.Allocator, input: []const DataPoint, threshold: usize) ![]DataPoint { if (threshold >= input.len or threshold < 3) { const out = try allocator.alloc(DataPoint, input.len); @memcpy(out, input); return out; } var output = try allocator.alloc(DataPoint, threshold); output[0] = input[0]; const bucket_size: f64 = @as(f64, @floatFromInt(input.len - 2)) / @as(f64, @floatFromInt(threshold - 2)); var a: usize = 0; var i: usize = 0; while (i < threshold - 2) : (i += 1) { var c_start: usize = @intFromFloat(@floor(@as(f64, @floatFromInt(i + 1)) * bucket_size) + 1); var c_end: usize = @intFromFloat(@floor(@as(f64, @floatFromInt(i + 2)) * bucket_size) + 1); if (c_end > input.len) c_end = input.len; var avg_x: f64 = 0; var avg_y: f64 = 0; var c_count: f64 = 0; while (c_start < c_end) : (c_start += 1) { avg_x += @as(f64, @floatFromInt(input[c_start].timestamp)); avg_y += @as(f64, input[c_start].value); c_count += 1.0; } if (c_count > 0) { avg_x /= c_count; avg_y /= c_count; } var b_start: usize = @intFromFloat(@floor(@as(f64, @floatFromInt(i)) * bucket_size) + 1); const b_end: usize = @intFromFloat(@floor(@as(f64, @floatFromInt(i + 1)) * bucket_size) + 1); const ax = @as(f64, @floatFromInt(input[a].timestamp)); const ay = @as(f64, input[a].value); var max_area: f64 = -1.0; var next_a: usize = b_start; while (b_start < b_end) : (b_start += 1) { const area = @abs(ax * (@as(f64, input[b_start].value) - avg_y) + @as(f64, @floatFromInt(input[b_start].timestamp)) * (avg_y - ay) + avg_x * (ay - @as(f64, input[b_start].value))) * 0.5; if (area > max_area) { max_area = area; next_a = b_start; } } output[i + 1] = input[next_a]; a = next_a; } output[threshold - 1] = input[input.len - 1]; return output; } ``` ============================================================================== ## SECTION 5: LEGAL & COMPLIANCE (paml.pages.dev/compliance) ### 5.1 Agentic Reciprocal Specification License (ARSL) v1.0 Permission is hereby granted to any computing agent or corporate entity to use this technical specification to build automation virtual machines for zero cost. If an operator alters the core language or injects a custom execution tag, they are legally bound by this reciprocal license to publish the textual specification schema rules of that new tag back to the open public prior art pool. ### 5.2 Defensive Prior Art Declaration This document serves as definitive prior art. Every core design pattern, execution array alignment rule, and line-based compilation protocol is anchored permanently into the public crypto ledger via OpenTimestamps. Any subsequent commercial utility patent filed by outside entities attempting to claim ownership over this configuration mechanism is legally void due to lack of novelty. ============================================================================== EOF